During the production of electronic devices such as printed circuit boards and chip carriers it is often desirable to increase the through via density to increase the Input/Output (I/O) capacity of the devices. A conventional manufacturing process involves drilling or laser cutting a hole through the board or carrier followed by plating of the board or carrier to metallize the walls of the hole so as to provide a conductive path from the top to the bottom of the board or chip carrier.
There is a need to produce high density co-axial connections for what in the industry are called organic printed wiring boards (i.e. polymer with fiber and/or particulate filler).
U.S. Pat. No. 4,911,796 discloses and claims a method to make a via with metallized side walls by coating the side walls with an ink. A single conductor is formed through the circuit board cross-section.
U.S. Pat. No. 5,300,911 discloses and claims a structure with co-axial vias that are used to carry current from two or more coupled windings to form a monolithic transformer. Vias are first formed in a fired ceramic ferrite to produce through holes. Patentees do not disclose how the holes are formed. Thereafter, the surface of the ferrite as well as the through hole side walls are plated and metal features on the surfaces are defined. After that, a dielectric is coated over the metal and another layer of metal is plated on the surface and on the side walls. Additional conductor layers can be applied to form a third or fourth co-axial via structure if needed. Although patentees disclose a process for making co-axial vias in a magnetic device (ferrite ceramic) the vias thus produced are not discrete. Vias on a planar layer are connected, usually in series, to form a circuitous path into and out of the ferrite to act as a winding. The vias on a layer are also not individually accessible or used to provide a signal path for wiring above and below the plane of the wiring layer. The dielectric layer is applied globally to the substrate by a process that does not allow patterning or personalization. Thus, there is no method to interconnect sequential layers of metallization other than at the edges of the substrate.
U.S. Pat. No. 5,374,788 discloses and claims a structure having a single through-hole that is used for top to bottom connection in a printed circuit board. The core metal and via holes in the epoxy are coated with co-axial metal or solder layers to improve adhesion. The layers comprising the co-axial coating are not electrically isolated from each other.
U.S. Pat. No. 5,541,567 discloses forming a co-axial via by wire bonding wires to be used as center conductors to a conductive surface and then inserting the protruding wires through holes placed in a ceramic or magnetic material layer. This structure is designed to perform like a transformer or inductor. This process for making solid conductors for large area circuit boards by wire bonding is impractical. The alignment of thousands of pins through an array of thousands of holes is also not achievable by conventional manufacturing processes. The finest pitch that could be attained would be much greater than a photolithographically or laser defined via pitch according to the present invention.
U.S. Pat. No. 5,653,834 discloses and claims a process to make electrical feed throughs for ceramic circuit board support substrates by coating the side walls of holes in an oxidized metal sheet with a glass. Thereafter the holes are metallized to provide a single conductor through the circuit board cross-section.
According to industry practice a single through via in a circuit board is produced by drilling or laser cutting holes through a carrier board. Multiple dielectric layers, platings and fillings are used to build up layers on both sides of the circuit board.